1. Techonlogy Field
The present invention relates to a logical block management method for a flash memory and a flash memory control circuit and a flash memory storage system using the same.
2. Description of Related Art
With a quick development of digital camera, cell phone and MP3, demand of storage media by customers is increased greatly. Since a flash memory has the advantages of data non-volatile, energy saving, small size and none mechanical structure etc., it is suitable for portable applications, and especially for portable battery-powered products. A solid state drive is a storage device applying an NAND flash memory as a storage medium thereof.
Generally, a flash memory module in a flash memory storage device has a plurality of physical blocks, and the physical blocks are logically grouped into a system area, a data area, a spare area and a replacement area by a flash memory controller of the flash memory storage device. The physical blocks in the system area are used to store related important information of the flash memory storage device, and the physical blocks in the replacement area are used to replace damaged physical blocks in the data area or the spare area. Therefore, in a general accessing state, a host system cannot access the physical blocks in the system area and the replacement area. The physical blocks grouped in the data area can store valid data written according to a writing command, and the physical blocks grouped in the spare area are used to replace the physical blocks of the data area during execution of the writing command. To be specific, when the flash memory storage device receives the writing command from the host system to update (or write) data in the physical block of the data area, the flash memory storage device selects a physical block from the spare area, and writes old valid data stored in the physical block of the data area to be updated and new data into the physical block selected from the spare area, and further links the physical block written with the new data to the data area. Moreover, the physical block to be updated is erased and is linked to the spare area. To smoothly access the physical blocks storing data in an alternation manner, the flash memory storage device provides logical blocks to the host system. Namely, alternation of the physical blocks is reflected by recording and renewing mapping relations between the logical blocks and the physical blocks of the data area within a logical block-physical block mapping table, so that the host system only need to perform a writing operation to the provided logical blocks, and the flash memory storage device then can read data from or write data into the mapped physical blocks according to the logical block-physical block mapping table.
However, with progress of fabrication process of the flash memory, while volume design of each physical block becomes greater, time for moving old valid data is comparatively increased, so that performance of the whole system is decreased. Moreover, when a flash memory storage device is used as a storage medium for installing a computer operating system, the operating system may constantly access specific data (for example, a file allocation table (FAT)), so that the physical blocks of the flash memory storage device are frequently erased to complete the update of data. However, erase times of the physical blocks is limited (for example, the physical blocks may be damaged after ten thousand times of erase), so that in a case that the physical blocks are frequently erased, a lifespan of the flash memory storage device is greatly reduced.
Generally, a user or an operating system has a specific usage pattern for storing data in the storage device. For example, use frequency of some logical blocks are relatively high, and use frequency of some other blocks are relatively low. Therefore, if a write mechanism is designed according to the use frequency of each of the logical blocks, the performance of the flash memory storage device can be effectively improved, so as to prolong the lifespan of the flash memory storage device. However, in a case of a limited resource of the flash memory storage device, how to distinguish a frequently used and an infrequently used logical block during each execution of an access command while considering the operation performance is a key to implement “designing the write mechanism according to the use frequency of each of the logical blocks”.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.